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Упорядочивание проекта

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This commit is contained in:
Andrey Pokidov 2025-11-26 22:43:29 +07:00
parent 0dcd9c0d4d
commit 89dfd7644b
32 changed files with 1730 additions and 1719 deletions
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16
basic-geometry-test/tests/versor/versor_copy.c
View file

@ -28,10 +28,10 @@ void test_versor_copy_fp32()
bgc_versor_copy_fp32(&_TEST_FP32_VERSOR_LIST[i], &versor);
if (versor.s0 != _TEST_FP32_VERSOR_LIST[i].s0 ||
versor.x1 != _TEST_FP32_VERSOR_LIST[i].x1 ||
versor.x2 != _TEST_FP32_VERSOR_LIST[i].x2 ||
versor.x3 != _TEST_FP32_VERSOR_LIST[i].x3) {
if (versor._s0 != _TEST_FP32_VERSOR_LIST[i]._s0 ||
versor._x1 != _TEST_FP32_VERSOR_LIST[i]._x1 ||
versor._x2 != _TEST_FP32_VERSOR_LIST[i]._x2 ||
versor._x3 != _TEST_FP32_VERSOR_LIST[i]._x3) {
print_testing_failed();
return;
}
@ -64,10 +64,10 @@ void test_versor_copy_fp64()
bgc_versor_copy_fp64(&_TEST_FP64_VERSOR_LIST[i], &versor);
if (versor.s0 != _TEST_FP64_VERSOR_LIST[i].s0 ||
versor.x1 != _TEST_FP64_VERSOR_LIST[i].x1 ||
versor.x2 != _TEST_FP64_VERSOR_LIST[i].x2 ||
versor.x3 != _TEST_FP64_VERSOR_LIST[i].x3) {
if (versor._s0 != _TEST_FP64_VERSOR_LIST[i]._s0 ||
versor._x1 != _TEST_FP64_VERSOR_LIST[i]._x1 ||
versor._x2 != _TEST_FP64_VERSOR_LIST[i]._x2 ||
versor._x3 != _TEST_FP64_VERSOR_LIST[i]._x3) {
print_testing_failed();
return;
}

4
basic-geometry-test/tests/versor/versor_reset.c
View file

@ -10,7 +10,7 @@ void test_versor_reset_fp32()
bgc_versor_reset_fp32(&versor);
if (versor.s0 != 1.0f || versor.x1 != 0.0f || versor.x2 != 0.0f || versor.x3 != 0.0f) {
if (versor._s0 != 1.0f || versor._x1 != 0.0f || versor._x2 != 0.0f || versor._x3 != 0.0f) {
print_testing_failed();
return;
}
@ -26,7 +26,7 @@ void test_versor_reset_fp64()
bgc_versor_reset_fp64(&versor);
if (versor.s0 != 1.0 || versor.x1 != 0.0 || versor.x2 != 0.0 || versor.x3 != 0.0) {
if (versor._s0 != 1.0 || versor._x1 != 0.0 || versor._x2 != 0.0 || versor._x3 != 0.0) {
print_testing_failed();
return;
}

20
basic-geometry-test/tests/versor/versor_set_values.c
View file

@ -30,7 +30,7 @@ void test_versor_set_values_fp32()
&versor
);
versor_module = sqrtf(versor.s0 * versor.s0 + versor.x1 * versor.x1 + versor.x2 * versor.x2 + versor.x3 * versor.x3);
versor_module = sqrtf(versor._s0 * versor._s0 + versor._x1 * versor._x1 + versor._x2 * versor._x2 + versor._x3 * versor._x3);
if (!bgc_is_unit_fp32(versor_module)) {
print_testing_error("Versor module is not equal to one.");
@ -41,19 +41,19 @@ void test_versor_set_values_fp32()
continue;
}
ratio = _TEST_FP32_VERSOR_DATA_LIST[i].s0 / versor.s0;
ratio = _TEST_FP32_VERSOR_DATA_LIST[i].s0 / versor._s0;
if (!bgc_is_zero_fp32(_TEST_FP32_VERSOR_DATA_LIST[i].x1) && !bgc_are_close_fp32(ratio, _TEST_FP32_VERSOR_DATA_LIST[i].x1 / versor.x1)) {
if (!bgc_is_zero_fp32(_TEST_FP32_VERSOR_DATA_LIST[i].x1) && !bgc_are_close_fp32(ratio, _TEST_FP32_VERSOR_DATA_LIST[i].x1 / versor._x1)) {
print_testing_error("Versor was not normalized proportionally (x1).");
return;
}
if (!bgc_is_zero_fp32(_TEST_FP32_VERSOR_DATA_LIST[i].x2) && !bgc_are_close_fp32(ratio, _TEST_FP32_VERSOR_DATA_LIST[i].x2 / versor.x2)) {
if (!bgc_is_zero_fp32(_TEST_FP32_VERSOR_DATA_LIST[i].x2) && !bgc_are_close_fp32(ratio, _TEST_FP32_VERSOR_DATA_LIST[i].x2 / versor._x2)) {
print_testing_error("Versor was not normalized proportionally (x2).");
return;
}
if (!bgc_is_zero_fp32(_TEST_FP32_VERSOR_DATA_LIST[i].x3) && !bgc_are_close_fp32(ratio, _TEST_FP32_VERSOR_DATA_LIST[i].x3 / versor.x3)) {
if (!bgc_is_zero_fp32(_TEST_FP32_VERSOR_DATA_LIST[i].x3) && !bgc_are_close_fp32(ratio, _TEST_FP32_VERSOR_DATA_LIST[i].x3 / versor._x3)) {
print_testing_error("Versor was not normalized proportionally (x3).");
return;
}
@ -88,7 +88,7 @@ void test_versor_set_values_fp64()
&versor
);
versor_module = sqrt(versor.s0 * versor.s0 + versor.x1 * versor.x1 + versor.x2 * versor.x2 + versor.x3 * versor.x3);
versor_module = sqrt(versor._s0 * versor._s0 + versor._x1 * versor._x1 + versor._x2 * versor._x2 + versor._x3 * versor._x3);
if (!bgc_is_unit_fp64(versor_module)) {
print_testing_error("Versor module is not equal to one.");
@ -99,19 +99,19 @@ void test_versor_set_values_fp64()
continue;
}
ratio = _TEST_FP64_VERSOR_DATA_LIST[i].s0 / versor.s0;
ratio = _TEST_FP64_VERSOR_DATA_LIST[i].s0 / versor._s0;
if (!bgc_is_zero_fp64(_TEST_FP64_VERSOR_DATA_LIST[i].x1) && !bgc_are_close_fp64(ratio, _TEST_FP64_VERSOR_DATA_LIST[i].x1 / versor.x1)) {
if (!bgc_is_zero_fp64(_TEST_FP64_VERSOR_DATA_LIST[i].x1) && !bgc_are_close_fp64(ratio, _TEST_FP64_VERSOR_DATA_LIST[i].x1 / versor._x1)) {
print_testing_error("Versor was not normalized proportionally (x1).");
return;
}
if (!bgc_is_zero_fp64(_TEST_FP64_VERSOR_DATA_LIST[i].x2) && !bgc_are_close_fp64(ratio, _TEST_FP64_VERSOR_DATA_LIST[i].x2 / versor.x2)) {
if (!bgc_is_zero_fp64(_TEST_FP64_VERSOR_DATA_LIST[i].x2) && !bgc_are_close_fp64(ratio, _TEST_FP64_VERSOR_DATA_LIST[i].x2 / versor._x2)) {
print_testing_error("Versor was not normalized proportionally (x2).");
return;
}
if (!bgc_is_zero_fp64(_TEST_FP64_VERSOR_DATA_LIST[i].x3) && !bgc_are_close_fp64(ratio, _TEST_FP64_VERSOR_DATA_LIST[i].x3 / versor.x3)) {
if (!bgc_is_zero_fp64(_TEST_FP64_VERSOR_DATA_LIST[i].x3) && !bgc_are_close_fp64(ratio, _TEST_FP64_VERSOR_DATA_LIST[i].x3 / versor._x3)) {
print_testing_error("Versor was not normalized proportionally (x3).");
return;
}

8
basic-geometry-test/tests/versor/versor_swap.c
View file

@ -48,8 +48,8 @@ void test_versor_swap_fp32()
bgc_versor_swap_fp32(&versor1b, &versor2b);
if (versor1a.s0 != versor2b.s0 || versor1a.x1 != versor2b.x1 || versor1a.x2 != versor2b.x2 || versor1a.x3 != versor2b.x3 ||
versor2a.s0 != versor1b.s0 || versor2a.x1 != versor1b.x1 || versor2a.x2 != versor1b.x2 || versor2a.x3 != versor1b.x3) {
if (versor1a._s0 != versor2b._s0 || versor1a._x1 != versor2b._x1 || versor1a._x2 != versor2b._x2 || versor1a._x3 != versor2b._x3 ||
versor2a._s0 != versor1b._s0 || versor2a._x1 != versor1b._x1 || versor2a._x2 != versor1b._x2 || versor2a._x3 != versor1b._x3) {
print_testing_failed();
return;
}
@ -88,8 +88,8 @@ void test_versor_swap_fp64()
bgc_versor_swap_fp64(&versor1b, &versor2b);
if (versor1a.s0 != versor2b.s0 || versor1a.x1 != versor2b.x1 || versor1a.x2 != versor2b.x2 || versor1a.x3 != versor2b.x3 ||
versor2a.s0 != versor1b.s0 || versor2a.x1 != versor1b.x1 || versor2a.x2 != versor1b.x2 || versor2a.x3 != versor1b.x3) {
if (versor1a._s0 != versor2b._s0 || versor1a._x1 != versor2b._x1 || versor1a._x2 != versor2b._x2 || versor1a._x3 != versor2b._x3 ||
versor2a._s0 != versor1b._s0 || versor2a._x1 != versor1b._x1 || versor2a._x2 != versor1b._x2 || versor2a._x3 != versor1b._x3) {
print_testing_failed();
return;
}